Effectiveness of Intrusion Detection Systems in High-Speed Networks through Simulation

Abstract

High-speed network infrastructures which operates at 10–100 Gbps pose high scalability challenges for modern Intrusion Detection Systems (IDS). This has been noted to be particularly true in terms of packet retention, detection latency as well as encrypted traffic analysis. While machine-learning and hardware-accelerated IDS architectures have been proposed to address these limitations their behavior under sustained wire-speed conditions can be said to still show insufficient characterization. Therefore, this study develops a simulation-based evaluation framework which can be reproduced. The framework integrates NS-3 traffic modeling, GNS3-based IDS deployment, and ML/DL classification pipelines which are trained on standard benchmark datasets (CIC-IDS2018 and NSL-KDD). Hardware acceleration (FPGA and GPU) is modeled using performance profiles derived from published benchmark studies. Therefore, enabling controlled comparison between CPU-only, GPU-assisted, FPGA-accelerated as well as hybrid architectures under identical high-throughput workloads. Results indicate that CPU-bound IDS experience substantial packet loss and degraded recall as throughput increases. On the other hand, FPGA-assisted and hybrid architectures sustain near line-rate performance with significantly reduced latency and improved detection stability. To that end, Hybrid CNN–LSTM models demonstrate superior detection of low-rate and multi-stage attacks, though at increased computational cost. Importantly, hardware-assisted pipelines preserve packet integrity under load, preventing the recall collapse observed in purely software-based deployments. This research can be noted to significantly contribute (i) a standardized, multi-layer simulation framework for high-speed IDS evaluation, (ii) a multi-metric performance assessment model combining detection accuracy and system-level scalability indicators, and (iii) empirical evidence that heterogeneous hardware-accelerated designs substantially enhance IDS robustness in high-throughput environments. These findings provide actionable guidance for designing scalable IDS architectures suitable for next-generation 5G, edge, and IoT networks.